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ADE7518
PLL
The ADE7518 is intended for use with a 32.768 kHz watch crystal.
A PLL locks onto a multiple of this frequency to provide a stable
4.096 MHz clock for the system. The core can operate at this
frequency or at binary submultiples of it to allow power savings
when maximum core performance is not required. The default
core clock is the PLL clock divided by 4, or 1.024 MHz. The ADE
energy measurement clock is derived from the PLL clock and is
maintained at 4.096 MHz/5 MHz, or 819.2 kHz, across all CD
settings.
PLL REGISTERS
Table 104. Power Control SFR (POWCON, 0xC5)
The PLL is controlled by the CD[2:0] bits in the Power Control
SFR (POWCON, 0xC5). To protect erroneous changes to the
POWCON SRF, a key is required to modify the register. First,
the Key SFR (KYREG, 0xC1) is written with the key, 0xA7, and
then a new value is written to the POWCON SFR.
If the PLL loses lock, the MCU is reset and the PLL_FLT bit is
set in the Peripheral Configuration SFR (PERIPH, 0xF4). Set
the PLLACK bit in the Start ADC Measurement SFR (ADCGO,
0xD8) to acknowledge the PLL fault, clearing the PLL_FLT bit.
Bit
7
6
Mnemonic
Reserved
METER_OFF
Default
1
0
Description
Reserved.
Set this bit to turn off the modulators and energy metering DSP circuitry to reduce power if metering
functions are not needed in PSM0.
5
4
3
2 to 0
Reserved
COREOFF
Reserved
CD[2:0]
0
0
010
This bit should be kept at 0 for proper operation.
Set this bit to shut down the core if in PSM1 operating mode.
Reserved.
Controls the core clock frequency (f CORE ). f CORE = 4.096 MHz/2 CD .
CD[2:0] Result (f CORE in MHz)
000 4.096
001 2.048
010 1.024
011 0.512
100 0.256
101 0.128
110 0.064
111 0.032
Writing to the Power Control SFR (POWCON, 0xC5)
Note that writing data to the POWCON SFR involves writing 0xA7 into the Key SFR (KYREG, 0xC1) followed by a write to the
POWCON SFR.
Table 105. Key SFR (KYREG, 0xC1)
Bit
7 to 0
Mnemonic
KYREG
Default
0
Description
Write 0xA7 to the KYREG SFR before writing to the POWCON SFR to unlock it.
Write 0xEA to the KYREG SFR before writing to the INTPR, HTHSEC, SEC, MIN, or HOUR timekeeping
registers to unlock it.
Rev. 0 | Page 98 of 128
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